Contemporary electronic systems, e.g. computer servers, require fault tolerant power supplies, meaning that the power supply and the overall system must remain operational in the event of one or more power converter failures. In fault tolerant power systems, frequently a plurality of power converters are connected in power-sharing fault-tolerant arrays to supply power to the system bus. Each individual converter, or in some cases a subset of converters, are connected to a system power bus. Fault tolerant circuitry traditionally presents at least one additional switch in the output current path to isolate the converter from the system bus in the event of a fault.
FIG. 1 shows a block diagram of a prior-art fault-tolerant power system 10. The system as shown is a power sharing array including two power converters 12, 17 having paralleled inputs connected to an input source through respective disconnect switches 15, 19 and paralleled outputs connected to a system power bus 13 through respective disconnect switches 16, 20. Fault detection control circuits 14, 18 monitor operation of their respective converters 12, 17 and upon detecting a fault open their respective disconnect switches 15, 16 and 19, 20. Although only two converters are shown, any number of power converters, e.g. 12, 17 may be connected in parallel to supply power to the system bus 13. By appropriately scaling the size and number of converters (i.e. the total power throughput and granularity of the array), the array may be configured to continue to operate with a failure of one or more of the converters, allowing the system to continue to operate.
The disconnect switches 15, 16, 19, 20 are preferably electronically controlled switches such as MOSFETs with low ON resistance to minimize power loss in the switch. The fault detection control circuits 14, 18 typically monitor converter operating conditions to detect various faults, such as input or output shorts. When a fault is detected, the respective fault detection control circuit 14, 18 turns the respective switch OFF disconnecting the failed converter from the system bus and preventing the fault from bringing down the entire system.
Many contemporary electronic systems require high current, e.g. 100 A or more, at low voltages, e.g. 3V, 1V, or less. A Factorized Power Architecture well suited for supplying power to low voltage high current loads is described in Vinciarelli, Factorized Power with Point of Load Sine Amplitude Converters, U.S. Pat. No. 6,975,098 issued Dec. 13, 2005 (the “Micro FPA Patent”) and U.S. Pat. No. 6,984,965 issued Jan. 10, 2006 (the “FPA Patent”) (both assigned to VLT, Inc. of Sunnyvale, Calif., and the entire disclosure of each is incorporated herein by reference). Power converters which function as DC-to-DC transformers called Voltage Transformation Modules (“VTM”) and Sine Amplitude Converters (“SAC”) which have a transfer function approximating Vo=KVTM*Vin−Io*RVTM are described in Vinciarelli, Factorized Power with Point of Load Sine Amplitude Converters, U.S. Pat. No. 6,930,893, Issued Aug. 16, 2005 (the “SAC Patent”) and in Vinciarelli, Point of Load Sine Amplitude Converters and Methods, U.S. Pat. No. 7,145,786, Issued Dec. 5, 2006 (the “POL SAC Patent”) (both assigned to VLT, Inc. of Sunnyvale, Calif., the entire disclosure of each is incorporated herein by reference).
A method of modulating the output resistance of power converters is described in Vinciarelli, Output Resistance Modulation in Power Converters, U.S. Pat. No. 6,934,166, Issued Aug. 23, 2005 (the “Modulation Patent”) assigned to VLT, Inc. of Sunnyvale, Calif., the entire disclosure of which is incorporated herein by reference.
Various reasons for and methods of clamping inductors and transformers in power converters are known. A double-clamped buck-boost converter which, in addition to an active clamp, shunts the primary winding to retain energy in the transformer and control techniques for operating the converter are described in Vinciarelli, Double-Clamped ZVS Buck-Boost Power Converter, U.S. Pat. No. 7,561,446, Issued Jul. 14, 2009 (the “Double-Clamp Patent”). A buck-boost converter incorporating switches to retain energy in an inductive element and control techniques for operating the converter are described in Vinciarelli, Buck-Boost DC-DC Switching power Conversion, U.S. Pat. No. 6,788,033, Issued Sep. 7, 2004 (the “Buck-Boost Patent”). Using a switch to retain energy in an inductive element as a means of reducing noise and switching losses in switching power converters is described in Prager et al., Loss and Noise Reduction in Power Converters, U.S. Pat. No. Re. 40,072 Re-issued Feb. 19, 2008 (the “Reverse Recovery Patent”) (all of which are assigned to VLT, inc. of Sunnyvale, Calif., and the entire disclosure of each is incorporated herein by reference).
Various power converter secondary-side output circuits are described in the SAC patent. Typical output circuits for supplying high-current low-voltage applications are shown in FIGS. 2A and 2B. (FIG. 2A corresponds to the output circuit shown in FIG. 15B of the SAC Patent.) Input circuitry (not shown) is used to drive the primary winding 34A (FIG. 2A), 34B (FIG. 2B) with power received from an input source (not shown). The AC from the center-tapped secondary is fed in alternate cycles to half-wave rectifiers 31A and 32A (FIG. 2A), 31B and 32B (FIG. 2B) which as shown may be MOSFET devices operated as rectifiers by a switch controller (not shown), to provide a full wave rectified output. The controlled switches 31, 32 are used as rectifiers to minimize power losses in the rectification circuitry.
In order to deliver power efficiently to high-current low-voltage loads, half-wave rectification is typically used to minimize the number of rectifiers through which the output current must flow. In order to provide a full-wave rectified output, typically the outputs of two half-wave rectifiers fed by oppositely-phased windings (e.g. a center-tapped winding) are connected in parallel. In the center-tapped output circuits shown in FIGS. 2A and 2B, half of the average output current flows through each switch thereby reducing power losses in the rectifiers over full bridge configurations in which the output current must flow through two switches. For this reason, particularly for supplying low voltage loads such as 5V, 3V, 1V, or less, half-wave rectification has been the standard.